Design and Analysis of High Performance Novel 3T XOR Gate based 32-bit Adder at 28nm Technology
نویسندگان
چکیده
In this paper, we designed and simulated a low power one bit, 8-bit and 32-bit full adder circuits namely Novel 10T, N14T, FA24T, CPL (complementary pass-transistor logic) and DPL (double pass-transistor logic). All the adders are tested by using one bit, 8-bit and 32-bit ripple carry adder architecture using Tanner EDA tool version 13. 0. The one bit Novel 10T, N14T, XOR/XNOR function technique has been used for the generation of full adders. The proposed design successfully works with the buffering circuit in the full adder design. All full adder circuits are simulated withT-SPICE using 28nm Technology with 500 Mega Hertz frequency at 0. 9 volt supply voltage. Due to lesser length requirement in the individual transistor, all the design of adders require lesser area as compared to existing design results in the tables. There is also
منابع مشابه
Novel Design of n-bit Controllable Inverter by Quantum-dot Cellular Automata
Application of quantum-dot is a promising technology for implementing digital systems at nano-scale. Quantum-dot Cellular Automata (QCA) is a system with low power consumption and a potentially high density and regularity. Also, QCA supports the new devices with nanotechnology architecture. This technique works </...
متن کاملA Novel Full Adder with High Speed Low Area
In most of the digital systems adder lies in the critical path that effects the overall speed of the system. So enhancing the performance of the 1-bit full adder cell is the main design aspect. The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant impr...
متن کاملA New design of 1-bit full adder based on XOR-XNOR gate
In this paper propose a new high performance 1 bit full adder cell using XOR/XNOR gate design style as well as lower power consumption. Simulation results illustrate the superiority of the resulting proposed adder against conventional 1-bit full-adder in terms of power consumption improvement performance (98% of 10T, 47% of 14T & 16T), propagation delay and PDP. We have performed simulations us...
متن کاملComparative Performance Analysis of XOR- XNOR Function Based High-Speed CMOS Full Adder Circuits For Low Voltage VLSI Design
This paper presents comparative study of high-speed, low-power and low voltage full adder circuits. Our approach is based on XOR-XNOR design full adder circuits in a single unit. A low power and high performance 9T full adder cell using a design style called “XOR (3T)” is discussed. The designed circuit commands a high degree of regularity and symmetric higher density than the conventional CMOS...
متن کاملA High Speed and Low Power 8 Bit × 8 Bit Multiplier Design Using Novel Two Transistor (2T) XOR Gates
The paper proposes a novel design of two transistor (2T) XOR gate and its application to design an 8 bit x 8 bit multiplier. The design explores the essence of suitably biasing the MOS transistor and engineering the threshold voltage of the MOS transistor through appropriate biasing and device geometry. Using the 2T XOR gates, a full adder has been realised. Detailed simulations have been carri...
متن کامل